Recently, laser drivers have been incorporated into preamplifiers for hard disc drives (HDDs) so as to perform heat assisted magnetic recording or HAMR. With heat assisted magnetic recording, a laser diode is focused on the media or platter (which is being written to) so as to changes the coercively of the media, making it easier for the writer to write data on the disk. In FIG. 1, a conventional laser driver 100 used for heat assisted magnetic recording can be seen. This laser driver 100 generally comprises switching channels 102-1 and 102-2 and threshold circuit 104 and is generally employed to drive lasing element D1 (which, for example, can be a laser diode).
Turning to FIG. 2, the switching channels 102-1 and 102-2 (labeled 102 for FIG. 2) are shown in greater detail. As shown, the switching channel 102 is generally comprised of a direct current (DC) loop 106, a switching network 108, and a driver 110. The DC loop 106 is able to generate a predetermined current that is used by the switching network 108 as a tail current. Based on the differential input signal INP and INM and this tail current, the switching network 108 is able to generate an output voltage for the driver 116.
Looking first to the DC loop 106, it receives an input current (which is a scaled version of the output current IOUT) from current source 114. Initially, current source 114 sinks this input current from the DC loop 106 so as to drive the gate of transistor Q3 low until transistor Q3 begins conducting current through resistor R4 (which is coupled to supply rail VDD). When current is conducted through resistor R4, a voltage develops across resistor R4, and this voltage is provided to driver 112 (which, as shown, is a class AB driver). The output from driver 112 is then provided to a second driver (which, as shown, is a class A driver that is comprised of resistor R2 and transistor Q2). This second driver (i.e., resistor R2 and transistor Q2) then drives transistor Q1. As the voltage at the base of transistor Q1 decreases, transistor Q1 starts to conduct current through resistor R1. The DC loop 106 can then settle at a point such that all of the input current is conducted through transistor Q1 and resistor R1 from supply rail VDD. At steady state, the current through resistor R4 and transistor Q3 (which, as shown, is a PMOS transistor) is provided to transistor Q4 (which, as shown, is diode-connected) and resistor R3 so as to be mirrored by transistor Q0 and resistor R9 (which can function as an adjustable current source that is controlled by transistor Q4) of switching network 108. Additionally, capacitor C1 is used to set a dominant pole in the DC loop 106 to improve stability.
Now, turning to the switching network 108, it employs current mode inputs to steer the appropriate current to driver 116. Namely, the bases of transistors Q5 and Q6 (which, as shown, are NPN transistors) receive a reference voltage REF, while the differential input signal INM/INP is received at the emitters of transistors Q5 and Q6. For this configuration, resistor R5 sets the common-mode voltage. When the positive portion INP is “logic high” (allows transistor Q5 to conduct), a current flows through resistors R5 and R7 and transistor Q5, and another current flows through resistors R5 and R8 to the base of transistor Q8. Under these circumstances and because transistors Q7 and Q8 function as a differential pair that receives the tail current from transistor Q0 and resistor R9, the base voltage of transistor Q8 is greater than the base voltage of transistor Q7, which allows current to be conducted through resistor R6 and transistor Q8, activating driver 110. Alternatively, when the negative portion INM is “logic high” (allows transistor Q6 to conduct), a current flows through resistors R5 and R8 and transistor Q6, and another current flows through resistors R5 and R7 to the base of transistor Q7. Under these circumstances, the base voltage of transistor Q7 is greater than the base voltage of transistor Q8, which allows current to be conducted through resistor transistor Q7, allowing the current across resistor R6 to go to zero and deactivating driver 110. The voltage that develops across resistor R6 is then scaled or amplified by driver 116 (which, as shown, is a class AB driver), an emitter follower (which, as shown, comprises resistor R10 and transistor Q9), and a common emitter amplifier (which, as shown, comprises transistor Q11 and resistor R11).
Turning to FIG. 3, threshold channel 104 can be seen in greater detail. The threshold channel 104 is coupled switching channels 102-1 and 102-2 at a common node (which is also coupled to diode D1) and provides a generally constant current from current mirror Q13/Q14 (which is coupled to resistors R12 and R13 and current source 118). This common node can then provide the output current TOUT to the lasing element D1 (i.e., laser diode), where the threshold channel 104 generally provides a threshold current and switching channels 102-1 and 102-2 provide additional currents.
This configuration (which is shown in FIGS. 1-3), however, has several drawbacks. Because transistors Q11 and Q12 are coupled in parallel, the output capacitance is quite large, reducing the data rate capability. Additionally, the repeated class AB drivers (i.e., driver 116) for each switching channel (i.e., 102-1) consumes a large amount of area. Therefore, there is a need for an improved driver.
Some other conventional circuits are: European Patent No. EP0333494; and U.S. Pat. No. 6,903,891.